Compute-Near Memory on a Base Die with Access to Multi-Stack Memory

A base die, comprising:

• at least two high-bandwidth memory (HBM) stacks disposed on the base die and communicate with a host die through the base die and an interposer;
• and
• compute circuitry on the base die to receive data from one or both of the HBM stacks and to execute instructions received from the host die, at least a portion of the compute circuitry disposed on the base die between the two HBM stacks,
• wherein the at least two HBM stacks and the host die are arranged in a row with the host die at one end of the row.

An integrated circuit, comprising:

• a host die disposed on a substrate and including a plurality of processors;
• a base die disposed on the substrate;
• at least two low-power double data rate (LPDDR) stacks adjacent to the base die and communicate with the host die through the base die;
• and
• compute circuitry on the base die operative to receive data from one or both of the LPDDR stacks, execute instructions received from the host die, and write back results of executing the instructions to the host die.