Chip package with multi-tier stacks
AssigneeAdvanced Micro Devices, Inc.
InventorsDeepak Vasant KULKARNI, Samuel NAFFZIGER
Life of this patent
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Abstract
Disclosed herein are chip packages and methods for fabricating and operating the same. In one example, a chip package is provided that includes a first die stack having a first side mounted to a first interposer, a first I/O die having a first side mounted to the first interposer, and a first compute die complex mounted on a second side of the first die stack. The first compute die complex including at least a first compute die having functional circuitry coupled to circuitry of the first I/O die through vias extending through the first die stack.
Claims20
A chip package comprising:
- a first die stack having a first side mounted to a first interposer;
- a first I/O die having a first side mounted to the first interposer;
- and
- a first compute die complex mounted on a second side of the first die stack, the first compute die complex including at least a first compute die having functional circuitry coupled to circuitry of the first I/O die through vias extending through the first die stack.
A chip package comprising:
- a first interposer;
- a first memory die stack mounted to the first interposer;
- a second memory die stack mounted to the first interposer laterally adjacent the first memory die stack;
- a first I/O die mounted to the first interposer;
- a second I/O die mounted to the first interposer, the first and second die stacks disposed between the first and second I/O dies;
- a second interposer disposed on the first and second die stacks and the first and second I/O dies;
- and
- a first compute die complex mounted on the second interposer above the first and second memory die stacks, the first compute die complex including at least a first compute die having functional circuitry coupled to circuitry of the first I/O die through vias extending through the first memory die stack.
A method for operating a chip package, the method comprising:
- transmitting data signals from a package substrate to a first interposer mounted on the package substrate;
- transmitting the data signals through the first interposer into an I/O die mounted on the first interposer;
- transmitting the data signals from I/O die mounted through the first interposer to vias formed through a memory die stack;
- and
- transmitting the data signals from the vias formed through the memory die stack to an IC compute die disposed above the memory die stack.
Dependencies are inferred from the claim text.