Semiconductor package

A semiconductor package comprising:

• a semiconductor chip comprising:
• a semiconductor substrate comprising an active layer;
• a power/ground chip pad on a lower surface of the semiconductor substrate;
• and
• a signal chip pad on the semiconductor substrate;
• a redistribution structure supporting the semiconductor chip, the redistribution structure comprising:
• a substrate insulation layer;
• a plurality of signal line patterns inside the substrate insulation layer and connected to the signal chip pad;
• and
• a plurality of power/ground line patterns inside the substrate insulation layer on a same level as the plurality of signal line patterns and connected to the power/ground chip pad;
• a first molding layer around the semiconductor chip on the redistribution structure and having a first dielectric constant;
• and
• a second molding layer having a second dielectric constant that is smaller than the first dielectric constant.

A manufacturing method of a semiconductor package, the manufacturing method comprising:

• disposing a semiconductor chip on a redistribution structure;
• electrically connecting a chip pad of the semiconductor chip and a substrate pad of the redistribution structure through a connection terminal;
• and
• forming a molding film around the semiconductor chip on the redistribution structure,
• wherein the molding film comprises a first molding layer having a first dielectric constant and a second molding layer having a second dielectric constant that is smaller than the first dielectric constant.