Semiconductor package including a molded underfill structure, and a package substrate

A semiconductor package comprising:

• a package substrate including a body layer and a first insulating layer that is disposed on the body layer;
• a first semiconductor chip mounted on the package substrate by a first bump;
• a second semiconductor chip mounted on the package substrate by a second bump;
• and
• a molding layer filling the space between the package substrate and the first semiconductor chip and the space between the package substrate and the second semiconductor chip, and surrounding the first and second semiconductor chips,
• wherein the body layer includes a first chip overlapping region that vertically overlaps the first semiconductor chip, a second chip overlapping region that vertically overlaps the second semiconductor chip and an intermediate region between the first chip overlapping region and the second chip overlapping region, and
• wherein the first insulating layer includes a first opening that exposes the intermediate region, an edge section of the first chip overlapping region abutting the intermediate region and an edge section of the second chip overlapping region abutting the intermediate region.