US 2026/0096455 A1 · MULTI-TIERED DEVICE HAVING AN ALIGNED THROUGH-VIA AND METHODS OF FORMING THE SAME

Abstract

A semiconductor device includes a first-tier structure and a second-tier structure. The first-tier structure includes a silicon portion with through-vias formed through the silicon portion after a back end of line process. The first-tier structure is attached to a first carrier that includes an alignment mark used to form the through-vias and the corresponding backside bump pad metal that are aligned with the through-vias at locations based on the alignment mark. The second-tier structure is bonded to the first-tier structure with the backside bump pad metals interposed between the two tiers. In some embodiments, the through-vias are a reverse pillar shape with a bottom recess and a specified ratio between a top portion and bottom portion.

Claims20

Dependent claims

A semiconductor device, comprising:

a first-tier structure, wherein the first tier structure comprises:
a plurality of through-vias located through a silicon portion of the first-tier structure, wherein:
a top width of the through-via is larger than a bottom width of the through-via;
each of the plurality of through-vias includes a through-via barrier layer;
and
a portion of the through-via barrier layer is located between a conductive metal material of the through-via and a top metal barrier layer;
and
a plurality of backside bump pad metals respectively coupled to the plurality of through-vias, wherein;
a second-tier structure bonded to the first-tier structure, wherein the second-tier structure comprises:
a plurality of bonding pad metals respectively bonded to the plurality of backside bonding pad metals of the first-tier structure.

7 more elements

Dependencies are inferred from the claim text.

Multi-tiered device having an aligned through-via and methods of forming the same

Life of this patent

Multi-tiered device having an aligned through-via and methods of forming the same

Life of this patent

Abstract

Claims20