Integrated circuit, system and method of forming the same

An integrated circuit, comprising:

• a first active region extending in a first direction, being on a first level above a front-side of a substrate, and the first active region comprises:
• a first drain region of a first transistor of a first type and a second drain region of a second transistor of the first type;
• a second active region extending in the first direction, being on a second level below the first level, and the second active region comprises:
• a third drain region of a third transistor of a second type and a fourth drain region of a fourth transistor of the second type, the second type being different from the first type;
• a first contact extending in a second direction different from the first direction, and the first contact being on a third level different from the first level and the second level, overlapping the first active region, and being coupled to the first drain region and the second drain region;
• a second contact extending in the second direction, being on a fourth level different from the first level, the second level and the third level, and overlapping the second active region, and the second contact being separated from the first contact in the first direction and a third direction different from the first direction and the second direction, and being coupled to the third drain region and the fourth drain region;
• and
• a first conductor extending in the first direction, being on the third level and the fourth level, and being coupled to the first contact and the second contact.

A method of fabricating an integrated circuit, the method comprising:

• fabricating a first set of transistors and a second set of transistors in a front-side of a substrate, the first set of transistors being stacked above the second set of transistors, wherein fabricating the first set of transistors and the second set of transistors comprises:
• fabricating a first set of contacts on a first level of the front-side of the substrate and a second set of contacts on a second level, the first set of contacts being electrically coupled to the first set of transistors, and the second set of contacts being electrically coupled to the second set of transistors;
• fabricating a first set of vias on the front-side of the substrate, the first set of vias being electrically coupled to at least the first set of transistors;
• depositing a first conductive material on the front-side of the substrate on a first metal level thereby forming a first set of conductors, the first set of conductors being electrically coupled to the first set of transistors by the first set of vias;
• performing thinning on a back-side of the substrate opposite from the front-side;
• and
• fabricating a second set of conductors in the back-side of the thinned substrate, the second set of conductors being in the first level and the second level, being embedded in the thinned substrate, and a first conductor of the second set of conductors is electrically coupled to a first contact of the first set of contacts and a first contact of the second set of contacts.