Transistors and semiconductor devices including the same
AssigneeSamsung Electronics Co., Ltd.
InventorDonggun Kim
Life of this patent
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Abstract
A transistor may include a gate structure on a substrate, the gate structure including a first gate dielectric pattern including a first metal oxide. A gate electrode includes a lower portion with a second metal oxide doped with tetravalent and pentavalent elements or with a metal oxynitride doped with the tetravalent and pentavalent elements. The gate electrode includes an upper portion on the lower portion with a metal doped with the tetravalent and pentavalent elements or a metal nitride doped with the tetravalent and pentavalent elements and a source/drain region at an upper portion of the substrate adjacent to the gate structure.
Claims20
A transistor comprising:
- a gate structure on a substrate, the gate structure including:
- a first gate dielectric pattern including a first metal oxide;
- a gate electrode comprising:
- a lower portion including a second metal oxide doped with tetravalent and pentavalent elements or a metal oxynitride doped with the tetravalent and pentavalent elements;
- and
- an upper portion on the lower portion including a metal doped with the tetravalent and pentavalent elements or a metal nitride doped with the tetravalent and pentavalent elements;
- and
- a source/drain region at an upper portion of the substrate adjacent to the gate structure.
A transistor comprising:
- a gate structure including a gate interface pattern, a first gate dielectric pattern, a second gate dielectric pattern and a gate electrode sequentially stacked on a substrate;
- and
- a source/drain region at an upper portion of the substrate adjacent to the gate structure, wherein:
- the gate interface pattern includes silicon oxide,
- each of the first and second gate dielectric patterns includes a high-K material,
- the gate electrode includes a metal or a metal nitride doped with tetravalent and pentavalent elements, and
- a concentration of the tetravalent and pentavalent elements in the gate electrode decreases along a vertical direction substantially perpendicular to an upper surface of the substrate as a distance from the upper surface of the substrate increases.
A semiconductor device comprising:
- a first transistor including:
- a first gate structure including a first gate interface pattern, a first gate dielectric pattern and a first gate electrode sequentially stacked on a first region of a substrate including the first region and a second region;
- and
- a first source/drain region at an upper portion of the substrate adjacent to the first gate structure;
- an epitaxial layer on the second region of the substrate;
- and
- a second transistor including:
- a second gate structure including a second gate interface pattern, a second gate dielectric pattern, a second gate electrode, a third gate dielectric pattern and a third gate electrode sequentially stacked on the epitaxial layer;
- and
- a second source/drain region at an upper portion of the epitaxial layer adjacent to the second gate structure,
- wherein each of the first and third gate electrodes includes:
- a lower portion including a first metal oxide or metal oxynitride, and
- an upper portion on the lower portion, the upper portion including a metal or a metal nitride, and
- wherein each of the first and third gate electrodes further includes tetravalent and pentavalent elements.
Dependencies are inferred from the claim text.