Semiconductor structure and manufacturing method thereof

A method of forming a semiconductor device comprising:

• forming an opening to a stack of nanostructures, wherein sidewalls of the opening are provided by a gate spacer and an inner spacer;
• applying an oxidizing plasma to the stack of nanostructures in the opening and surfaces of the gate spacer and the inner spacer providing the sidewalls for the opening, wherein the oxidizing plasma forms a non-uniform thickness oxide surface on the stack of nanostructures in the opening;
• forming a high-k gate dielectric on the non-uniform thickness oxide surface on the stack of nanostructures in the opening;
• and
• forming a gate electrode on the high-k gate dielectric.

A semiconductor device comprising:

• a stack of nanostructures;
• a gate structure including a high-k gate dielectric on a first portion of the stack of nanostructures and a gate electrode on the high-k gate dielectric;
• source/drain regions on opposing sides of the gate structure;
• and
• a spacer on sidewalls of the gate electrode 102 and separating the gate electrode 102 and the source/drain regions in a space between separated nanostructures in the stack of nanostructures, wherein the spacer comprises an oxide surface having a first width at an upper surface of the stack of nanostructures, and a second width at a lower surface of the stack of nanostructures, wherein the first width is greater than the second width.