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US 2026/0096090 A1Published application
Semiconductor device with low k spacer and method for fabricating the same
AssigneeSK hynix Inc.
InventorSe Ra HWANG
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Abstract
A semiconductor device includes a bit line structure and a storage contact spaced apart from each other over a substrate; a bit line spacer formed on a sidewall of the bit line structure; a landing pad formed over the storage contact; a boron-containing capping layer disposed between the bit line structure and the landing pad; a boron-containing etch stop layer over the boron-containing capping layer; and a capacitor including a storage node coupled to the landing pad by passing through the boron-containing etch stop layer.
Claims7
A method for fabricating a semiconductor device, the method comprising:
- forming a plurality of bit line structures and a plurality of bit line spacers in an upper portion of a substrate of a cell region, the substrate including the cell region and a peripheral circuit region;
- forming a plurality of storage contacts disposed between the plurality of bit line spacers of the cell region;
- forming landing pads over the storage contacts of the cell region, respectively;
- forming metal interconnections over the substrate of the peripheral circuit region;
- forming a boron-containing capping layer between the landing pads of the cell region;
- forming a boron-containing spacer layer between the metal interconnections of the peripheral circuit region;
- and
- forming a carbon-containing spacer layer over the boron-containing spacer layer of the peripheral circuit region.
5 more elements
Dependencies are inferred from the claim text.