Dual network chip layout for a large modular system
AssigneeArista Networks, Inc.
InventorsDaehwan Daniel Kim, Jason Chan, Man Him Andrew Ho, Paulmer Soderberg
Life of this patent
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AssigneeArista Networks, Inc.
InventorsDaehwan Daniel Kim, Jason Chan, Man Him Andrew Ho, Paulmer Soderberg
Estimating the term…
A “back-to-back” arrangement of printed circuit boards (PCBs) is provided. Network processors are mounted to the front sides of the PCBs. The network processors are connected to a plurality of nodes by a plurality of signal channels. More particularly, a first subset of the signal channels connects a network processor on a first of the back-to-back PCBs to the plurality of nodes and a second subset of the signal channels connects a network processor on the second of the back-to-back PCBs to the plurality of nodes. Each of the plurality of signals channels is configured to satisfy an insertion loss requirement.
An apparatus with multiple network processors, comprising:
A fabric card for a network device, the fabric card comprising:
A network device comprising:
Dependencies are inferred from the claim text.