Package substrate and semiconductor package including the same

A package substrate comprising:

• a first wiring layer and a second wiring layer stacked along a first direction,
• wherein the first wiring layer comprises:
• a plurality of first ground layers spaced apart from each other in the first direction;
• a first insulating region penetrating the plurality of first ground layers and extending in the first direction;
• a plurality of first signal layers in the first insulating region, and spaced apart from each other in the first direction;
• and
• a plurality of metal layers in the first insulating region, and between the plurality of first ground layers and the plurality of first signal layers, and spaced apart from each other in the first direction, and
• wherein the second wiring layer comprises:
• a plurality of second ground layers spaced apart from each other in the first direction;
• a second insulating region penetrating the plurality of second ground layers, and extending in the first direction;
• and
• a plurality of second signal layers in the second insulating region, and spaced apart from each other in the first direction,
• wherein the plurality of first ground layers and the plurality of metal layers are electrically connected to the second ground layers, and
• wherein the plurality of first signal layers are electrically connected to the plurality of second signal layers.