Automatic conversion gain selection adc for image sensors

An analog-to-digital converter (ADC) comprising:

• a reference signal generator configured to generator a reference signal;
• a clock pulse generator configured to generate a clock;
• a comparator configured to compare the reference signal and a pixel signal readout from a high dynamic range (HDR) pixel, where the HDR pixel has a low conversion gain (LCG) mode and a high conversion gain (HCG) mode;
• a counter coupled to the output of the comparator and to the clock, the counter configured to start counting in response to the output of the comparator and the clock, the counter outputting a digital representation of the pixel signal;
• and
• a logic block configured to compare the output of the comparator to a saturation limit of the HDR pixel and generate a feedback signal to the HDR pixel, the feedback signal for configuring circuitry of the HDR pixel to select one of the HCG mode or the LCG mode based on whether the output of the comparator exceeds the saturation limit.

An analog-to-digital converter (ADC) comprising:

• a reference signal generator configured to generator a reference signal;
• a clock pulse generator configured to generate a clock;
• a comparator configured to compare the reference signal and a pixel signal readout from a high dynamic range (HDR) pixel, where the HDR pixel has a low conversion gain (LCG) mode, a high conversion gain (HCG) mode and a lateral overflow integrating capacitor (LOFIC) conversion mode, and the pixel signal is a sampled LOFIC signal;
• a counter coupled to the output of the comparator and to the clock, the counter configured to start counting in response to the output of the comparator and the clock, the counter outputting a digital representation of the pixel signal;
• and
• a logic block configured to compare the output of the comparator to a threshold value and generate two feedback signals to the HDR pixel, the two feedback signals for configuring circuitry of the HDR pixel to select one of the HCG mode, the LCG mode or the LOFIC conversion gain mode based on whether the output of the comparator exceeds the threshold value.

An image sensor comprising:

• a pixel array comprising rows and columns of high dynamic range (HDR) pixels, each HDR pixel including circuitry for processing charge accumulated on a photodiode of the HDR pixel when exposed to light and selection circuitry for selecting one of at least two conversion gain modes for readout of the HDR pixels;
• readout circuitry configured to readout each column of the pixel array by selecting each row of the pixel array in a sequence in accordance with the selected conversion gain mode;
• an analog-to-digital converter (ADC) coupled to each column of the pixel array, each ADC comprising:
• a comparator configured to compare a reference signal and a pixel signal readout from an HDR pixel in accordance with the selected conversion mode;
• a counter coupled to the output of the comparator and to the clock, the counter configured to start counting in response to the output of the comparator and the clock, the counter outputting a digital representation of the pixel signal;
• and
• a logic block coupled to selection circuitry of the HDR pixel, the logic block configured to compare the output of the comparator to a saturation limit or threshold value and to generate at least one feedback signal to the HDR pixel for configuring the selection circuitry of the HDR pixel based on whether the output of the comparator exceeds the saturation limit or threshold value.