Methods and apparatus to mitigate electrothermal damage in clamping circuits

An apparatus comprising:

• voltage clamping circuitry having first, second, third, and fourth terminals;
• a first transistor having a gate terminal coupled to the third terminal of the voltage clamping circuitry, a drain terminal coupled to the first terminal of the voltage clamping circuitry, and a source terminal coupled to the second terminal of the voltage clamping circuitry;
• a second transistor having a gate terminal, a drain terminal coupled to the drain terminal of the first transistor, and a source terminal coupled to the source terminal of the first transistor;
• a third transistor having a gate terminal coupled to the fourth terminal of the voltage clamping circuitry, a drain terminal coupled to the gate terminal of the first transistor, and a source terminal coupled to the gate terminal of the second transistor;
• a fourth transistor having a gate terminal, a drain terminal coupled to the gate terminal of the first transistor, and a source terminal coupled to the gate terminal of the second transistor;
• and
• Over Current Protection (OCP) circuitry coupled to the gate terminal of the fourth transistor.

An apparatus comprising:

• voltage clamping circuitry having a first terminal coupled to a supply voltage terminal, a second terminal coupled to a ground terminal, a third terminal, and a fourth terminal;
• a first transistor having a gate terminal coupled to the third terminal of the voltage clamping circuitry, a drain terminal coupled to the supply voltage terminal, and a source terminal coupled to the ground terminal;
• a second transistor having a gate terminal, a drain terminal coupled to the supply voltage terminal, and a source terminal coupled to the ground terminal;
• a third transistor having a gate terminal coupled to the fourth terminal of the voltage clamping circuitry, a drain terminal coupled to the gate terminal of the first transistor, and a source terminal coupled to the gate terminal of the second transistor;
• a resistor having a first terminal coupled to the gate terminal of the second transistor and a second terminal;
• a fourth transistor having a gate terminal coupled to the fourth terminal of the voltage clamping circuitry, a drain terminal coupled to the second terminal of the resistor, and a source terminal coupled to the ground terminal;
• a fifth transistor having a gate terminal, a drain terminal coupled to the supply voltage terminal, and a source terminal coupled to the third terminal of the voltage clamping circuitry;
• and
• a sixth transistor having a gate terminal, a drain terminal coupled to the source terminal of the fifth transistor, and a source terminal coupled to the ground terminal.