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US 2026/0094629 A1Published application
Memory cell array comprising sensing bitline metal layer and current-carrying metal layer
AssigneeSilicon Storage Technology, Inc.
InventorsHieu Van Tran, Hoa Vu, Stephen Trinh, Stanley Hong, Thuan Vu, Nghia Le, Duc Nguyen, Hien Pham
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Abstract
In one example, a system comprises an array of memory cells arranged in rows and columns, the array comprising bitlines coupled to respective columns in the array, respective bitlines comprising a sensing bitline metal layer and a current-carrying metal layer, wherein the sensing bitline metal layer does not carry current.
Claims7
A system comprising:
- an array of memory cells arranged in rows and columns, the array comprising bitlines coupled to respective columns in the array, respective bitlines comprising a sensing bitline metal layer and a current-carrying metal layer, wherein the sensing bitline metal layer does not carry current.
Dependencies are inferred from the claim text.