Gate driver and display device including the same
AssigneeSamsung Display Co., Ltd.
InventorKYUNGHOON CHUNG
Life of this patent
Estimating the term…
Abstract
A gate driver includes: a stage, which generates a carry signal and provides the carry signal to a next stage; and an output controller, which receives the carry signal and an enable signal, controls a voltage of a first control node in the output controller based on the carry signal or both the carry signal and the enable signal, and outputs a gate signal based on the voltage of the first control node or both the voltage of the first control node and the enable signal. The gate signal corresponds to the carry signal under a predetermined condition.
Claims20
An electronic device, comprising:
- a processor configured to provide input image data;
- and
- a display device configured to display an image based on the input image data,
- wherein the display device includes:
- a display panel including pixels;
- a data driver configured to provide data voltages corresponding to the input image data to the pixels;
- a gate driver configured to provide gate signals to the pixels and including stages and output controllers;
- and
- a timing controller configured to control the data driver and the gate driver,
- wherein each of the stages is configured to generate a carry signal and to provide the carry signal to one of next stages,
- wherein each of the output controllers is configured to receive the carry signal and an enable signal and to output the gate signal corresponding to the carry signal only when the enable signal has an activation level, and
- wherein each of the output controllers includes a first control node which is a junction between two complementary transistors each receiving the carry signal and connected in series between a high voltage line and a low voltage line.
A gate driver, comprising:
- a stage configured to generate a carry signal and to provide the carry signal to one of next stages;
- and
- an output controller configured to receive the carry signal and an enable signal and to output a gate signal corresponding to the carry signal only when the enable signal has an activation level,
- wherein the output controller includes a first control node which is a junction between two complementary transistors each receiving the carry signal and connected in series between a high voltage line and a low voltage line.
Dependencies are inferred from the claim text.