Pixel, display device, and electronic device

A display device comprising:

• pixels connected to scan lines, emission control lines, and data lines;
• and
• a scan driver that drives the scan lines,
• wherein each of the pixels includes:
• a first transistor including a gate electrode connected to a first node, the first transistor connected between a second node and a first driving power source node to which a first driving power source is supplied;
• a second transistor connected between a data line and a third node, the second transistor including a gate electrode electrically connected to a first scan line;
• a third transistor connected between the first node and the second node, the third transistor including a gate electrode electrically connected to a second scan line;
• a fourth transistor connected between the first node and an initialization power source node to which an initialization power source is supplied, the fourth transistor including a gate electrode electrically connected to a third scan line;
• a fifth transistor connected between the third node and a reference power source node to which a reference power source is supplied, the fifth transistor including a gate electrode electrically connected to the second scan line;
• a sixth transistor connected between the second node and a fourth node, the sixth transistor including a gate electrode electrically connected to an emission control line;
• and
• a light emitting element connected to the fourth node,
• wherein in a non-emission period in which the sixth transistor is turned off, at least one second scan signal is applied to the second scan line, and after the at least one second scan signal is applied, an off-bias voltage is applied to the first transistor during a bias period.

An electronic device comprising:

• a display device including pixels;
• and
• a processor that controls the display device,
• wherein each of the pixels includes:
• a first transistor including a gate electrode connected to a first node, the first transistor connected between a second node and a first driving power source node to which a first driving power source is supplied;
• a second transistor connected between a data line and a third node, the second transistor including a gate electrode electrically connected to a first scan line;
• a third transistor connected between the first node and the second node, the third transistor including a gate electrode electrically connected to a second scan line;
• a fourth transistor connected between the first node and an initialization power source node to which an initialization power source is supplied, the fourth transistor including a gate electrode electrically connected to a third scan line;
• a fifth transistor connected between the third node and a reference power source node to which a reference power source is supplied, the fifth transistor including a gate electrode electrically connected to the second scan line;
• a sixth transistor connected between the second node and a fourth node, the sixth transistor including a gate electrode electrically connected to an emission control line;
• and
• a light emitting element connected to the fourth node,
• wherein in a non-emission period in which the sixth transistor is turned off, at least one second scan signal is applied to the second scan line, and after the at least one second scan signal is applied, an off-bias voltage is applied to the first transistor during a bias period.