US 2026/0093889 A1Published application

Power switch placement method

OwnerAbhinav Ratna, Kam-Tou Sio +1inventors

InventorsAbhinav Ratna, Kam-Tou Sio, Raja Kumar Martha

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Abstract

A method of power switch placement and optimization in an integrated circuit is described. The method includes designating multiple sections in the integrated circuit. The sections are defined by a section width parallel to a first direction and a section length perpendicular to the first direction. For each section, a section type is determined based on a ratio of the section length to the section width belonging to a certain range of values. Each section has a corresponding power switch geometry specification determined in part by the section type. A power switch geometry specification is selected based on the section type, and the power switches are placed in each section according to the power switch geometry specification.

Claims18

Dependent claims

A method of power switch placement in an integrated circuit comprising:

designating in the integrated circuit a plurality of sections, wherein:
the integrated circuit comprises a plurality of parallel rows, each row extending along a first longitudinal direction;
each section being defined by a section length and a section width,
wherein the section length is measured along the first longitudinal direction, and the section width is measured perpendicular to the first longitudinal direction;
for each section:
determining a section type, wherein the section type is defined by a ratio of the section length to the section width, each section type corresponding to a particular ratio range, and wherein each section type has a corresponding power switch geometry specification specific to that section type and different from each other section type;
selecting a power switch geometry specification for the section type of the section;
and
placing power switches in the section according to the power switch geometry specification.

6 more elements

An apparatus, comprising:

a data processing apparatus;
and
at least one memory coupled to the data processing apparatus and storing programming instructions for execution by the data processing apparatus to cause the data processing apparatus to perform operations comprising:
designating in an integrated circuit a plurality of sections, wherein:
the integrated circuit comprises a plurality of parallel rows, each row extending along a first longitudinal direction;
each section being defined by a section length and a section width,
wherein the section length is measured along the first longitudinal direction, and the section width is measured perpendicular to the first longitudinal direction;
for each section:
determining a section type, wherein the section type is defined by a ratio of the section length to the section width, each section type corresponding to a particular ratio range, and wherein each section type has a corresponding power switch geometry specification specific to that section type and different from each other section type;
selecting a power switch geometry specification for the section type of the section;
and
specifying placing power switches in the section according to the power switch geometry specification.

9 more elements

Dependencies are inferred from the claim text.