Nand accelerator for vector-vector multiplication

A method for operating a NAND memory system, the method comprising:

• creating one or more trees each having intermediate nodes and leaf nodes, each leaf node having a plurality of vectors but no more vectors than a number of bit lines in a plane in the NAND memory system, each vector having “i” elements, wherein i is an integer greater than 1;
• storing the one or more trees in non-transitory memory, each tree being a data structure;
• mapping, for each respective leaf node in the one or more trees, each vector in the respective leaf node to one or more bit lines in the NAND memory system;
• programming, for each respective vector in the one or more trees, NAND memory cells associated with the one or more bit lines associated with the respective vector to represent the i elements of the respective vector;
• identifying one or more candidate leaf nodes in the one or more trees based on an input vector having i elements;
• applying signals to NAND strings associated with the one or more candidate leaf nodes to represent the input vector;
• sensing the bit lines associated with the one or more candidate leaf nodes in parallel in response to applying the signals to represent the input vector;
• and
• determining a distance between the input vector and each vector in the one or more candidate leaf nodes based on sensing the bit lines.

A NAND memory system, comprising:

• a plurality of planes, each plane comprising NAND memory cells and a plurality of bit lines;
• and
• one or more control circuits in communication with the plurality of planes, the one or more control circuits configured to:
• identify a plurality of candidate leaf nodes in a set of trees, each candidate leaf node comprises a plurality of vectors, each tree being a data structure stored in non-transitory memory;
• identify one or more basic compute engines in the plurality of planes that store the vectors of the candidate leaf nodes, wherein each basic compute engine comprises a plurality of NAND memory cells in a single plane of the plurality of planes, wherein each basic compute engine is associated with the plurality of bit lines of the plane;
• apply signals to the one or more basic compute engines to represent an input vector;
• for each respective basic compute engine of the one or more basic compute engines, sense the plurality of bit lines associated with the respective basic compute engine;
• and
• determine distances between the input vector and each of the vectors in the candidate leaf nodes based on sensing the plurality of bit lines of the one or more basic compute engines.