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US 2026/0093636 A1Published application
Read modify write optimization using new bitfield compare and update instructions
AssigneeAdvanced Micro Devices, Inc.
InventorsNeeraj Upadhyay, Ranjal Gautham Shenoy
Life of this patent
Estimating the term…
Abstract
A bitfield compare-and-update instruction separates compare and exchange operations on the same lock state variable. When executing the bitfield compare and update instruction, the processing system compares a portion of the lock state variable to a previously-loaded value and, in response to a match, updates a different portion of the lock state variable.
Claims20
A method, comprising:
- determining, at a processor, that a first processor core is to access shared data;
- and
- in response to the determining:
- comparing a first portion of a first cache line to a first local copy at the first processor core;
- and
- modifying a second portion of the first cache line in response to the comparing indicating a match.
3 more elements
A processing system, comprising:
- at least one processor comprising a first processor core, the processor configured to:
- in response to determining that the first processor core is to access shared data:
- compare a first portion of a first cache line to a first local copy at the first processor core;
- and
- modify a second portion of the first cache line in response to the comparing indicating a match.
2 more elements
A method, comprising:
- comparing, at a first processor core, a first portion of a semaphore to a local count that corresponds to the first portion semaphore;
- and
- obtaining access to shared data based on the comparing.
Dependencies are inferred from the claim text.