Serial peripheral interface to multiple memory types
AssigneeAdvanced Micro Devices, Inc.
InventorKanda K. Palanisamy
Life of this patent
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AssigneeAdvanced Micro Devices, Inc.
InventorKanda K. Palanisamy
Estimating the term…
An apparatus includes one or more controller circuits that are configured to be coupled to a first memory that implements random access and a second memory that implements serial access. A processing unit is configured to generate a map indicating a first set of addresses allocated to the first memory and a second set of addresses allocated to the second memory. The processing unit configures the controller circuit(s) to selectively access either the first memory or the second memory based on the map. In some cases, the first memory is a NOR-based memory, the second memory is a NAND flash memory, and the controller circuit is a serial peripheral interface (SPI) controller circuit. Selectively accessing the first memory or the second memory can include asserting a signal on a first or second chip select pin.
An apparatus comprising:
An apparatus comprising:
A method comprising:
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An apparatus comprising:
Dependencies are inferred from the claim text.