Techniques for managing memory exception handling
AssigneeMicron Technology, Inc.
InventorSanthosh Kumar Siripragada
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorSanthosh Kumar Siripragada
Estimating the term…
Methods, systems, and devices for techniques for managing memory exception handling are described. A memory device may write first data associated with a first access command to a first portion of a buffer of a memory device. The memory device may determine a programming failure to write second data to a page of a first block of the memory device. In response to determining the programming failure, the memory device may perform an access operation associated with the first access command to vacate the first data from the first portion of the buffer. In response, the memory device may write the second data to the first portion of the buffer. The memory device may write the second data from the first portion of the buffer to a page of a second block of the memory device in response to writing the second data to the first portion of the buffer.
(canceled)
A memory system, comprising:
A memory system, comprising:
A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of a memory system, cause the memory system to:
Dependencies are inferred from the claim text.