Memory device including mode register and method of reading mode register thereof

A memory system comprising:

• a memory controller configured to consecutively issue a refresh command at a first period and a refresh mode register read command at a second period longer than the first period;
• and
• a memory device, connected to the memory controller, comprising:
• a memory cell array including a plurality of memory cells;
• an input/output circuit configured to transmit user data stored in the memory cell array to the memory controller;
• a mode register configured to store mode register information data related to the memory device and output the mode register information data through the input/output circuit according to a request of the memory controller;
• and
• a control logic circuit configured to:
• perform a refresh operation of the memory cell array based on the refresh command;
• and
• control the mode register to output the mode register information data in response to the refresh mode register read command while performing the refresh operation in response to the refresh mode register read command.

A method of operating a memory device, the method comprising:

• periodically receiving a refresh command from a memory controller;
• performing a refresh operation during a refresh execution time based on the refresh command;
• checking whether the refresh command includes a mode register read request;
• and
• outputting, in response to the mode register read request being included in the refresh command, information data stored in the mode register corresponding to the mode register read request during the refresh execution time.