Interface control device and operating method thereof, and memory device and data processing system having the same

An operating method of an interface control device, the method comprising:

• receiving, from an external device, a first signal synchronized with a first clock;
• outputting a second signal corresponding to the first signal synchronized with the second clock received from an internal device;
• dividing the second signal into a plurality of signals to generate configuration information corresponding to the plurality of signals;
• storing the configuration information;
• and
• performing an interfacing operation based on the configuration information.

A memory device comprising:

• an interface control device;
• a device group including at least one memory;
• and
• a device controller configured to control the device group based on signals provided from an external device through the interface control device,
• where the interface control device includes:
• a clock domain crossing (CDC) circuit configured to receive, from the external device, a first signal synchronized with a first clock, and output a second signal corresponding to the first signal synchronized with a second clock;
• a demultiplexer configured to divide the second signal into a plurality of signals to generate configuration information corresponding to the plurality of signals;
• a configuration register configured to store the configuration information;
• and
• an interface controller configured to operate according to the configuration information stored in the configuration register.

A data processing system comprising:

• at least one first device configured to operate in a first clock domain based on a first clock;
• and
• at least one second device including an interface control device configured to receive, from the at least one first device, a first signal synchronized with the first clock, and operate in a second clock domain based on a second clock,
• wherein the interface control device includes:
• a clock domain crossing (CDC) circuit configured to receive, from the first device, the first signal synchronized with the first clock, and output a second signal corresponding to the first signal synchronized with the second clock;
• a demultiplexer configured to divide the second signal into a plurality of signals to generate configuration information corresponding to the plurality of signals;
• a configuration register configured to store the configuration information;
• and
• an interface controller configured to operate according to the configuration information stored in the configuration register.