Touch sensor controller including a line driver and method of calibration of a line driver

A method of calibrating a line driver for a touch panel, the line driver having a line driver output configured to be coupled to a row or column of a touch panel, the method comprising:

• providing a line drive current;
• providing a sense current related to the line drive current;
• digitizing the sense current to provide a plurality of digitized sense current values;
• determining an overload status dependent on the digitized sense current values;
• and
• controlling the line driver to adapt the line drive current dependent on the overload status.

A line driver for a touch panel, the line driver comprising:

• a first current mirror comprising a first PMOS transistor and a second PMOS transistor, wherein a gain factor of the first PMOS transistor is variable between 1 and N times the gain factor of the second PMOS transistor, a source of the first PMOS transistor and the second PMOS transistor is coupled to a supply rail, a drain of the first PMOS transistor is coupled to the line driver output, a drain of the second PMOS transistor is coupled to a gate of the first PMOS transistor and a gate of the second PMOS transistor;
• a second current mirror comprising a first NMOS transistor and a second NMOS transistor, wherein the gain factor of the first NMOS transistor is variable between 1 and N times the gain factor of the second NMOS transistor, a source of the first NMOS transistor and the second NMOS transistor is coupled to a ground rail, a drain of the first NMOS transistor is coupled to the line driver output, a drain of the second NMOS transistor is coupled to a gate of the first NMOS transistor, a gate of the second NMOS transistor and the inverting output of the OTA;
• a third current mirror comprising a third NMOS transistor and a fourth NMOS transistor, a source of the third NMOS transistor and the fourth NMOS transistor is coupled to a ground rail, a drain of the third NMOS transistor is coupled to a non-inverting output of the OTA, a gate of the third NMOS transistor, and a gate of the fourth NMOS transistor, a drain of the fourth NMOS transistor is coupled to the drain of the second PMOS transistor.