Method for forming three-dimensional integrated circuit structure

A method of fabricating a three-dimensional (3D) integrated circuit structure, comprising:

• forming a first semiconductor structure comprising a first plurality of dies molded by a first gap-fill material, and a first re-distribution layer electrically connected to the first plurality of dies, wherein the first re-distribution layer comprises a plurality of first bonding pads and a first insulating layer around the plurality of first bonding pads;
• forming a second semiconductor structure comprising a second plurality of dies molded by a second gap-fill material, and a second re-distribution layer electrically connected to the second plurality of dies, wherein the second re-distribution layer comprises a plurality of second bonding pads and a second insulating layer around the plurality of second bonding pads;
• and
• hybrid bonding the first semiconductor structure and the second semiconductor structure, wherein the plurality of first bonding pads is directly bonded to the plurality of second bonding pads, respectively.