Microelectronic assemblies with tags disintegrated from cache memory

A microelectronic assembly, comprising:

• a first die comprising cache memory, wherein the cache memory includes an array of memory cells;
• and
• a second die comprising tags for determining whether a requested piece of data is available in the cache memory,
• wherein the first die and the second die are stacked above one another in a stack of dies.

A microelectronic assembly, comprising:

• a microelectronic component;
• and
• a stack of dies coupled to the microelectronic component,
• wherein the stack of dies includes a first die comprising cache memory and a second die comprising tags for determining whether a requested piece of data is available in the cache memory, and
• wherein the cache memory includes transistors of a first transistor architecture, the tags include transistors of a second transistor architecture, and the microelectronic component is one of an interposer, a package substrate, a circuit board, or a further die.