Integrated circuit packages including a heat spreader having a high thermal conductivity material in 3 dimensional die stacks

A microelectronic assembly, comprising:

• a first die having a surface;
• a second die having a first surface and an opposing second surface, wherein the first surface of the second die is electrically coupled to the surface of the first die;
• a third die having a first surface and an opposing second surface, wherein the first surface of the third die is electrically coupled to the surface of the first die;
• a dielectric material on the surface of the first die and around and between the second die and the third die, the dielectric material having a non-planar surface;
• a first material on the non-planar surface of the dielectric material and on the second surfaces of the second die and the third die, the first material having a thermal conductivity equal to or greater than 10 watt per meter-kelvin (W/m-K) and a thickness between 1 micron and 2 microns;
• a second material, on the first material, the second material including one or more of titanium, tantalum, gold, ruthenium, silver, aluminum and nitrogen, silicon and oxygen, silicon and nitrogen, and silicon, carbon, and nitrogen;
• and
• a third material, on a portion of the second material, wherein the third material is on the second surface of the second die and not on the second surface of the third die, and wherein the third material has a thermal conductivity equal to or greater than 150 watt per meter-kelvin (W/m-K) and a thickness between 1 micron and 200 microns.

A microelectronic assembly, comprising:

• a first layer including a first die;
• a second layer, on the first layer, including second dies and a first dielectric material around and between the second dies, and wherein a surface of the first dielectric material has an inconsistent topography, and wherein the first die is electrically coupled to the second dies by interconnects having a pitch of less than 10 microns between adjacent interconnects;
• a third layer, on the second layer, including:
• a first material having a thermal conductivity equal to or greater than 10 watt per meter-kelvin (W/m-K) and a thickness between 1 micron and 2 microns;
• and
• a second material, on the first material, the second material including one or more of titanium, tantalum, gold, ruthenium, silver, aluminum and nitrogen, silicon and oxygen, silicon and nitrogen, and silicon, carbon, and nitrogen;
• a fourth layer, on the third layer, including a third material having a thermal conductivity equal to or greater than 150 watt per meter-kelvin (W/m-K) and a thickness between 1 micron and 200 microns;
• and
• a fifth layer, on the fourth layer, including third dies and a second dielectric material around and between the third dies, and wherein a surface of the second dielectric material has an inconsistent topography.