US 2026/0090127 A1Published application

Semiconductor package

AssigneeSamsung Electronics Co., Ltd.

InventorsSHLE-GE LEE, YUN SEOK CHOI, SUNWOO HAN, SANG-UK KIM

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Abstract

A semiconductor package may include a package substrate including top and bottom surfaces, the top surface including first and second surfaces, the first surface being located at a level higher than the second surface, an image sensor chip on the first surface of the package substrate, a transparent substrate on the image sensor chip, a dam structure on an edge portion of the image sensor chip and between the image sensor chip and the transparent substrate, and a mold layer on the second surface of the package substrate and enclosing the dam structure. The image sensor chip may include a semiconductor substrate including a pixel array region and a pad region extending therearound and a conductive pad on the pad region. The conductive pad may be electrically connected to a connection pad on the second surface of the package substrate.

Claims20

Dependent claims

A semiconductor package, comprising:

a package substrate comprising a top surface and an opposite bottom surface, the top surface comprising a first surface and a second surface, wherein the first surface is at a level higher than the second surface;
an image sensor chip on the first surface of the package substrate;
a transparent substrate on the image sensor chip;
a dam structure on an edge portion of the image sensor chip and between the image sensor chip and the transparent substrate;
and
a mold layer on the second surface of the package substrate and enclosing the dam structure,
wherein the image sensor chip comprises:
a semiconductor substrate comprising a pixel array region and a pad region extending around a periphery of the pixel array region, the pixel array region comprising a light-receiving region and a light-blocking region between the light-receiving region and the pad region;
and
a conductive pad on the pad region,
wherein the conductive pad of the image sensor chip is electrically connected to a connection pad, wherein the connection pad is on the second surface of the package substrate.

8 more elements

A semiconductor package, comprising:

a package substrate comprising a top surface and an opposite bottom surface, the top surface comprising a first surface and a second surface, wherein the first surface is at a level higher than the second surface;
an image sensor chip on the first surface of the package substrate;
a transparent substrate on the image sensor chip;
a dam structure on an edge portion of the image sensor chip and between the image sensor chip and the transparent substrate;
and
a mold layer on the second surface of the package substrate and enclosing the dam structure,
wherein the image sensor chip comprises a semiconductor substrate comprising a pixel array region and a pad region extending around a periphery of the pixel array region,
wherein the pixel array region comprises a light-receiving region and a light-blocking region between the light-receiving region and the pad region,
wherein the mold layer comprises:
a first region on a side surface of the semiconductor substrate, wherein the first region extends to the top surface of the package substrate;
and
a second region on a side surface of the dam structure, wherein the second region extends to a side surface of the transparent substrate,
wherein a ratio between a length of the second region in a first direction and a length of the first region in the first direction ranges from 0.68:1 to 1.7:1, and
wherein the first direction is perpendicular to the top surface of the package substrate.

11 more elements

A semiconductor package, comprising:

a package substrate comprising a top surface and an opposite bottom surface, wherein the top surface comprises a first surface and a second surface, wherein the first surface is at a level higher than the second surface;
an image sensor chip on the first surface of the package substrate;
a transparent substrate on the image sensor chip;
a dam structure on an edge portion of the image sensor chip and between the image sensor chip and the transparent substrate;
and
a mold layer on the second surface of the package substrate and enclosing the dam structure,
wherein the image sensor chip comprises:
a semiconductor substrate comprising a pixel array region and a pad region extending around a periphery of the pixel array region, the pixel array region comprising a light-receiving region and a light-blocking region between the light-receiving region and the pad region;
color filters on the light-receiving region of the semiconductor substrate;
a light-blocking pattern on the light-blocking region of the semiconductor substrate;
micro lenses on the color filters;
a passivation layer on surfaces of the micro lenses and a top surface of the light-blocking pattern;
and
a conductive pad on the pad region,
wherein the mold layer comprises:
a first region on a side surface of the semiconductor substrate, wherein the first region extends to the top surface of the package substrate;
and
a second region on a side surface of the dam structure, wherein the second region extends to a side surface of the transparent substrate,
wherein the conductive pad of the image sensor chip is electrically connected to a connection pad on the second surface of the package substrate.

16 more elements

Dependencies are inferred from the claim text.