Semiconductor package and method of manufacturing the semiconductor package

A semiconductor package comprising:

• a package substrate;
• an image sensor chip on the package substrate including a sensing region, a pad region at least partially surrounding the sensing region, a plurality of lenses in the sensing region and a plurality of chip pads in the pad region;
• a plurality of dummy pads including a plurality of first dummy pads and a plurality of second dummy pads in the pad region of the image sensor chip;
• a reinforcement wire structure including a plurality of reinforcement wires each including a first end portion connected to a first dummy pad of the plurality of first dummy pads and a second end portion opposite to the first end portion that is connected to a second dummy pad of the plurality of second dummy pads;
• a plurality of bonding wires each electrically connecting respective ones of a plurality of upper substrate pads to respective ones of the plurality of chip pads;
• a dam structure on the plurality of dummy pads and on the reinforcement wire structure that is on the pad region of the image sensor chip;
• a glass on the dam structure and overlapping the image sensor chip;
• and
• a molding member on the image sensor chip and on the plurality of bonding wires.

A semiconductor package, comprising:

• a package substrate including a plurality of upper substrate pads on an upper surface of the package substrate and a plurality of lower substrate pads on a lower surface opposite to the upper surface;
• an image sensor chip on the upper surface of the package substrate, the image sensor chip including a sensing region, a pad region at least partially surrounding the sensing region, a plurality of lenses in the sensing region and a plurality of chip pads in the pad region;
• a plurality of dummy pads including a plurality of first dummy pads and a plurality of second dummy pads in the pad region of the image sensor chip;
• a plurality of bonding wires electrically connecting respective ones of the plurality of upper substrate pads of the package substrate to respective ones of the plurality of chip pads;
• a reinforcement wire structure including a plurality of reinforcement wires wherein ones of the plurality of reinforcement wires include a first end portion connected to a respective first dummy pad of the plurality of first dummy pads and a second end portion opposite to the first end portion and connected to a respective second dummy pad of the plurality of second dummy pads;
• a dam structure on the plurality of chip pads and on the plurality of dummy pads and on the plurality of bonding wires and on the reinforcement wire structure that is on the pad region of the image sensor chip;
• a glass on the dam structure and on the image sensor chip;
• a molding member on the image sensor chip and on the plurality of bonding wires;
• and
• a plurality of external connection members on the plurality of lower substrate pads, respectively.