Gate-all-around transistors and methods of forming

A gate-all-around device, comprising:

• a plurality of dummy gates over a plurality of nanosheets, wherein each of the plurality of nanosheets comprises an upper surface and a set of opposing sidewall surfaces, wherein the plurality of nanosheets each further comprise a plurality of alternating first layers and second layers, wherein the plurality of nanosheets extend in a vertical direction from a substrate base, and wherein a first thickness of the second layers, in a horizontal direction, is less than a second thickness of the first layers, in the horizontal direction;
• and
• an inner spacer formed just along the second layers.

A semiconductor device, comprising:

• a plurality of dummy gates over a plurality of nanosheets, wherein each of the plurality of nanosheets comprises an upper surface and a set of opposing sidewall surfaces, wherein the plurality of nanosheets each further comprise a plurality of alternating first layers and second layers, wherein the plurality of nanosheets extend in a vertical direction from a substrate base, and wherein a first thickness of the second layers, in a horizontal direction, is less than a second thickness of the first layers, in the horizontal direction;
• and
• an inner spacer formed just along the second layers of the set of opposing sidewall surfaces.