Semiconductor device gate structure and related methods

A method of fabricating a semiconductor device, comprising:

• providing a fin including an epitaxial layer defining a semiconductor channel layer;
• surrounding an exposed surface of the epitaxial layer with a liner layer;
• performing a plasma treatment process to the liner layer to define a first region of the liner layer disposed over a first portion of the epitaxial layer and second region of the liner layer disposed over a second portion of the epitaxial layer;
• removing the first region of the liner layer to form a gap between the epitaxial layer and an adjacent epitaxial layer defining an adjacent semiconductor channel layer, while a second region of the liner layer remains disposed over the second portion of the epitaxial layer;
• and
• forming a portion of a metal gate structure within the gap, wherein a metal gate profile of the portion of the metal gate structure has a convex shape or a concave shape.

A semiconductor device, comprising:

• a plurality of semiconductor channel layers formed above a substrate;
• inner spacers disposed between adjacent semiconductor channel layers of the plurality of semiconductor channel layers and on either side of a channel region;
• and
• a metal gate structure disposed between the adjacent semiconductor channel layers, wherein the inner spacers are disposed on either side of the metal gate structure, and wherein a liner layer is disposed between part of the metal gate structure and each of the adjacent semiconductor channel layers;
• wherein a metal gate profile of the metal gate structure has a convex shape or a concave shape.