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US 2026/0089976 A1Published application
Memory device and operating method of memory device
AssigneeSK hynix Inc.
InventorsGap Sok DO, Jang Gun KIM, Ung Hee PARK, Yoon Cheol BAE, In Seon YEO
Life of this patent
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Abstract
A memory device may include a plurality of vertical bit lines disposed between a plurality of first access lines and a plurality of second access lines, a plurality of first selection circuits between the plurality of vertical bit lines and the plurality of first access lines, and a plurality of second selection circuits between the plurality of vertical bit lines and the plurality of second access lines.
Claims30
A memory device comprising:
- a plurality of vertical bit lines disposed between a plurality of first access lines and a plurality of second access lines;
- a plurality of first selection circuits disposed between the plurality of vertical bit lines and the plurality of first access lines;
- and
- a plurality of second selection circuits disposed between the plurality of vertical bit lines and the plurality of second access lines.
1 more element
A memory device comprising:
- a plurality of first selection circuits disposed over a plurality of first access lines;
- a plurality of vertical bit lines disposed over the plurality of first selection circuits, respectively;
- a plurality of memory cells each comprising a memory material that surrounds at least a side of each of the plurality of vertical bit lines;
- a plurality of second selection circuits disposed over the plurality of vertical bit lines;
- and
- a plurality of second access lines disposed over the plurality of second selection circuits,
- wherein each of the plurality of first selection circuits and the plurality of second selection circuits are set so that a current flows in a first direction or a second direction.
4 more elements
A method for operating a memory device, comprising:
- receiving a command;
- selecting a vertical bit line from a plurality of vertical bit lines while a plurality of word planes are in a floating state;
- performing an operation according to the command on at least one memory cell from a plurality of memory cells coupled to the selected vertical bit line;
- and
- initializing the selected vertical bit line.
2 more elements
Dependencies are inferred from the claim text.