US 2026/0089949 A1 · MEMORY DEVICE AND DRIVING METHOD THEREOF

Abstract

A memory device includes a substrate, a channel layer on one surface of the substrate and including a semiconductor oxide, a gate electrode between the substrate and the channel layer, a reservoir layer between the channel layer and the gate electrode, an electrolyte layer between the channel layer and the reservoir layer, and a gate oxide layer between the gate electrode and the reservoir layer, wherein the reservoir layer is capable of transferring oxygen vacancies therein to the channel layer or receiving oxygen vacancies transferred from the channel layer depending on a voltage applied to the gate electrode, and a thickness of the electrolyte layer is less than 5 nm.

Claims20

Dependent claims

A memory device comprising:

a substrate;
a channel layer on one surface of the substrate, the channel layer including a semiconductor oxide;
a gate electrode between the substrate and the channel layer;
a reservoir layer disposed the channel layer and the gate electrode;
an electrolyte layer between the channel layer and the reservoir layer;
and
a gate oxide layer between the gate electrode and the reservoir layer,
wherein the reservoir layer is capable of transferring oxygen vacancies therein to the channel layer or receiving oxygen vacancies transferred from the channel layer, depending on a voltage applied to the gate electrode, and
a thickness of the electrolyte layer is less than 5 nm.

6 more elements

A method of driving a memory device, the memory device including a substrate, a channel layer on one surface of the substrate and including a semiconductor oxide, a gate electrode between the substrate and the channel layer, a reservoir layer between the channel layer and the gate electrode, an electrolyte layer between the channel layer and the reservoir layer and having a thickness of less than 5 nm, and a gate oxide layer between the gate electrode and the reservoir layer, the method comprising, the method comprising:

transferring oxygen vacancies present in the reservoir layer to the channel layer or transferring oxygen vacancies present in the channel layer to the gate electrode when a voltage is applied to the gate electrode such that an electrical conductivity and a threshold voltage (Vth) of the channel layer change values different from the electrical conductivity and the threshold voltage (Vth) of the channel layer prior to the application of the voltage to the gate electrode, and
performing a write operation or an erase operation as the electrical conductivity and the threshold voltage of the channel layer changes.

Dependencies are inferred from the claim text.

Facts

Application

19/172,171Filed 7 Apr 2025

Priority

KR 10-2024-013027325 Sep 2024

Published

26 Mar 2026

Term ends

Not estimatedThe source records don’t support an estimate.

Classification18 codes

H10B 43/27
With source and drain on different levels, e.g. with sloping channels: the channels comprising vertical portions, e.g. U-shaped channels
H10N 70/24
Multistable switching devices, e.g. memristors: based on migration or redistribution of ionic species, e.g. anions, vacancies
G11C 13/0007
Using resistive RAM [RRAM] elements: comprising metal oxide memory material, e.g. perovskites
G11C 16/14
Programming or data input circuits: circuits for erasing electrically, e.g. erase voltage switching circuits

Memory device and driving method thereof

Life of this patent

Memory device and driving method thereof

Life of this patent

Abstract

Claims20