Semiconductor device, memory device, and memory system

A memory device, comprising:

• gate line slit structures extending along a first direction and arranged in a second direction different from the first direction, wherein the gate line slit structures comprise a first gate line slit structure and a second gate line slit structure;
• channel structures;
• a source layer connected with channel structures;
• and
• source contacts connected with the source layer, wherein the source contacts and the channel structures being located on two sides of the source layer in a third direction, the source contacts comprise a first source contact and a second source contact, a first distance between the first source contact and the second source contact is greater than a second distance between the first gate line slit structure and the second gate line slit structure.

A memory device, comprising:

• gate line slit structures extending along a first direction, wherein the gate line slit structures comprise a first gate line slit structure and a second gate line slit structure arranged in a second direction different from the first direction;
• channel structures formed in rows and columns;
• a source layer connected with channel structures;
• and
• a source contact connected with the source layer, the source contact and the channel structures being located on two sides of the source layer in a third direction different from the first direction and the second direction, wherein the source contact overlaps with first channel structures of the channel structures, the first channel structures are in at least three rows and at least three columns.