Zero-latency switching between different video resolutions

A video display system comprising:

• a video display;
• and
• a processor configured to transmit a video stream to the video display, wherein the video stream comprises first frames in a first resolution and frame rate mode and second frames in a second resolution and frame rate mode, wherein a total horizontal pixel width of each frame of the first frames and of each frame of the second frames is the same, wherein a pixel clock rate of the first frames and of the second frames is the same.

A non-transitory computer-readable medium comprising instructions that, when executed by one or more processors, cause the one or more processors to:

• receive a trigger to switch a video data stream of frames between a first resolution and frame rate mode and a second resolution and frame rate mode;
• and
• switch, in response to the trigger, the video data stream between the first resolution and frame rate mode and the second resolution and frame rate mode, wherein a total horizontal pixel width of each frame of the video data stream in the first resolution and frame rate mode and of each frame of the video data stream in the second resolution and frame rate mode are the same, wherein a pixel clock rate of the video data stream in the first resolution and frame rate mode and the video data stream in the second resolution and frame rate mode are the same.