Non-disruptive fastpath flow invalidation scheme to address networking configuration changes

A system comprising:

• memory comprising processor-executable stored instructions;
• and
• a processor configured to execute the stored instructions to:
• receive a packet of a flow for fast path processing according to initial fast path programming at fast path hardware of a Network Virtualization Device (“NVD”);
• determine with the fast path that the flow and the initial fast path programming are provisionally invalid;
• and
• process the packet according to the initial fast path programming with the fast path hardware.

A non-transitory computer-readable storage medium storing a plurality of instructions executable by one or more processors, the plurality of instructions when executed by the one or more processors cause the one or more processors to:

• receive a packet of a flow for fast path processing according to initial fast path programming at fast path hardware of a Network Virtualization Device (“NVD”);
• determine with the fast path that the flow and the initial fast path programming are provisionally invalid;
• and
• process the packet according to the initial fast path programming with the fast path hardware.