Flit decoder generating decoded packet fragment, communication device including the same, and method of operating the same

A communication device comprising:

• an input/output (I/O) circuit including a plurality of transmitters and a plurality of receivers;
• a flit encoder configured to provide a first packet to the plurality of transmitters;
• and
• a flit decoder configured to receive a second packet from the plurality of receivers,
• wherein the flit decoder includes:
• an error correction code (ECC) decoder configured to generate an ECC decoded packet fragment based on a packet fragment of the second packet;
• an interleaver circuit configured to generate an interleaved packet based on the ECC decoded packet fragment;
• a cyclic redundancy check (CRC) decoder configured to generate an enable signal based on a failure of a CRC decoding operation of the interleaved packet;
• a reliability calculator configured to generate bit stream information for identifying first to N-th error-estimated symbols among a plurality of symbols of the packet fragment;
• and
• a post decoder configured to:
• in response to the enable signal, generate first to N-th index values corresponding to the first to N-th error-estimated symbols, respectively, based on the bit stream information;
• generate first to M-th candidate information indicating two of the first to N-th index values, which are combined without duplication and without considering an order;
• generate first to M-th erasure decoded packet fragments based on the first packet and the first to M-th candidate information;
• and
• provide a selected one of the first to M-th erasure decoded packet fragments to the interleaver circuit,
• wherein “N” is a natural number less than a number of the plurality of symbols, and
• wherein “M” is NC2.

A method of operating a flit decoder, the method comprising:

• receiving a packet including a first packet fragment, a second packet fragment, and a third packet fragment;
• generating a first error correction code (ECC) decoded packet fragment, a second ECC decoded packet fragment, and a third ECC decoded packet fragment, based on the first packet fragment, the second packet fragment, and the third packet fragment;
• generating a first interleaved packet based on the first ECC decoded packet fragment, the second ECC decoded packet fragment, and the third ECC decoded packet fragment;
• generating an enable signal based on a failure of a first cyclic redundancy check (CRC) decoding operation of the first interleaved packet;
• generating bit stream information for identifying first to N-th error-estimated symbols among a plurality of symbols of the first packet fragment, “N” being a natural number less than a number of the plurality of symbols;
• generating first to N-th index values corresponding to the first to N-th error-estimated symbols, respectively, based on the enable signal and the bit stream information;
• generating first to M-th candidate information indicating two of the first to N-th index values, which are combined without duplication and without considering an order, “M” being NC2;
• generating first to M-th erasure decoded packet fragments based on the first packet fragment and the first to M-th candidate information;
• selecting one of the first to M-th erasure decoded packet fragments as a post-decoded packet fragment;
• and
• generating a second interleaved packet based on the post-decoded packet fragment, the second ECC decoded packet fragment, and the third ECC decoded packet fragment.