Loading patent…
OwnerSantosh Kumar, Raghavendra Kulkarni +1inventors
InventorsSantosh Kumar, Raghavendra Kulkarni, Gunjan Mandal
Estimating the term…
A decision feedback equalizer (DFE) includes a first sample-and-hold (SH) circuit to generate a first voltage signal pair based on an input voltage signal, a second SH circuit to generate a second voltage signal pair based on the input voltage signal, and a first comparator circuit to generate a first output voltage signal based on the first voltage signal pair, a first feedback signal, and a second feedback signal. The first SH circuit generates the first voltage signal pair at least based on a first clock signal. The first SH circuit is configured to limit the first clock signal to at least a 25% duty cycle based on limiting a conversion phase delay associated with the first clock signal, narrowing a reset phase of the first clock signal, and generating a hold phase of the first clock signal based on the narrowing of the reset phase.
An equalizer circuit comprising:
An apparatus comprising:
A method for manufacturing an equalizer circuit, comprising:
Dependencies are inferred from the claim text.