Phased-array apparatus and phased-array system

A phased-array apparatus, comprising:

• a second chip configured to one or more of send or receive a second signal;
• a third chip configured to one or more of send or receive a third signal;
• and
• a third functional layer on a first surface of the second chip and a first surface of the third chip,
• wherein
• the second chip and the third chip are connected to an antenna element by way of a redistribution wiring on the third functional layer,
• a normal direction of a first plane on which the first surface of the second chip is located is perpendicular to a normal direction of a second plane on which a surface of the antenna element is located,
• a normal direction of a third plane on which the first surface of the third chip is located is perpendicular to the normal direction of the second plane on which the surface of the antenna element is located,
• the redistribution wiring extends along the first surface of the second chip, and
• the redistribution wiring extends along the first surface of the third chip.

A phased-array system, comprising:

• at least one first phased-array apparatus;
• and
• at least one second phased-array apparatus,
• wherein
• the at least one first phased-array apparatus is connected to an antenna element,
• the first phased-array apparatus comprises:
• a first chip configured to one or more of send or receive a first signal;
• and
• a first functional layer on a first surface of the first chip,
• the first chip is connected to the antenna element by way of a first redistribution wiring on the first functional layer, the redistribution wiring extends along the first surface of the first chip, and a normal direction of a first plane on which the first surface of the first chip is located is perpendicular to a normal direction of a second plane on which a first surface of the antenna element is located;
• the at least one second phased-array apparatus is connected to the antenna element,
• the at least one second phased-array apparatus comprises:
• a second chip configured to one or more of send or receive a second signal;
• a third chip configured to one or more of send or receive a third signal;
• and
• a third functional layer on a first surface of the second chip and a first surface of the third chip,
• the second chip and the third chip are connected to the antenna element by way of a second redistribution wiring on the third functional layer,
• a normal direction of a third plane on which the first surface of the second chip is located is perpendicular to a normal direction of a fourth plane on which a second surface of the antenna element is located,
• a normal direction of a fifth plane on which the first surface of the third chip is located is perpendicular to the normal direction of the fourth plane on which the surface of the antenna element is located,
• the redistribution wiring extends along the first surface of the second chip, and
• the redistribution wiring extends along the first surface of the third chip.