Memory devices and operating methods thereof, memory systems

A memory system, comprising:

• a memory cell array, comprising:
• a first memory string, comprising:
• memory cells,
• a first bottom select gate;
• and
• a second bottom select gate;
• word lines coupled to the memory cells;
• a first ground select line coupled to the first bottom select gate;
• and
• a second ground select line coupled to the second bottom select gate;
• a second memory string;
• a peripheral circuit coupled to the first ground select line and the second ground select line, wherein the peripheral circuit is configured to, during a program verify process of one of the memory cells:
• apply a first voltage to the first ground select line;
• and
• apply a second voltage different from the first voltage to the second ground select line;
• and
• a memory controller coupled to the memory device, and configured to control the memory device.

A method of operating a memory device, comprising:

• programming a first bottom select gate and a second bottom select gate to make the first bottom select gate and the second bottom select gate be programmed to different target threshold voltages, wherein the memory device comprises a first memory string and a second memory string and the first memory string comprises the first bottom select gate and the second bottom select gate;
• and
• during a program verify process of a memory cell of the first memory string:
• applying a first voltage to a first ground select line coupled to the first bottom select gate;
• and
• applying a second voltage different from the first voltage to a second ground select line coupled to the second bottom select gate.