US 2026/0088087 A1 · SEMICONDUCTOR DEVICE, METHOD OF OPERATING THEREOF, SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM

Abstract

According to one aspect of the present disclosure, a semiconductor device is provided. The semiconductor device may include a memory array comprising a first memory string and a second memory string. The first memory string may include at least one first dummy memory cell. The semiconductor device may include a peripheral circuit coupled to the memory array and configured to perform a program operation on the at least one first dummy memory cell, such that a threshold voltage of the at least one first dummy memory cell is adjusted from an initial threshold to a first target threshold. In a case where the threshold voltage of the at least one first dummy memory cell reaches the first target threshold, a difference between a current of the first memory string and a current of the second memory string may be less than or equal to a preset threshold.

Claims20

Dependent claims

A semiconductor device, comprising:

a memory array comprising a first memory string and a second memory string, the first memory string comprising at least one first dummy memory cell;
and
a peripheral circuit coupled to the memory array and configured to perform a program operation on the at least one first dummy memory cell, such that a threshold voltage of the at least one first dummy memory cell is adjusted from an initial threshold to a first target threshold;
wherein in a case where the threshold voltage of the at least one first dummy memory cell reaches the first target threshold, a difference between a current of the first memory string and a current of the second memory string is less than or equal to a preset threshold.

1 more element

A method of operating a semiconductor device, comprising:

performing a program operation on at least one first dummy memory cell included in a first memory string included in the semiconductor device, such that a threshold voltage of the at least one first dummy memory cell is adjusted from an initial threshold to a first target threshold;
wherein in a case where the threshold voltage of the at least one first dummy memory cell reaches the first target threshold, a difference between a current of the first memory string and a current of a second memory string included in the semiconductor device is less than or equal to a preset threshold.

Dependencies are inferred from the claim text.

Facts

Application

19/237,809Filed 13 Jun 2025

Priority

CN 202411346247.925 Sep 2024

Published

26 Mar 2026

Term ends

Not estimatedThe source records don’t support an estimate.

Classification16 codes

G11C 16/0483
Using variable threshold transistors, e.g. FAMOS: comprising cells having several storage transistors connected in series
G11C 7/14
Arrangements for writing information into, or reading information out from, a digital store: dummy cell management; Sense reference voltage generators
G11C 7/16
Arrangements for writing information into, or reading information out from, a digital store: storage of analogue signals in digital stores using…
G11C 11/5642
Using charge storage in a floating gate: sensing or reading circuits; Data output circuits

Semiconductor device, method of operating thereof, system, and computer-readable storage medium

Life of this patent

Semiconductor device, method of operating thereof, system, and computer-readable storage medium

Life of this patent

Abstract

Claims20