Semiconductor device

A semiconductor device comprising:

• a first region including a plurality of memory cell groups, each of the plurality of memory cell groups including a first switching element, a second switching element, and a plurality of capacitors including a ferroelectric layer;
• and
• a second region including a plurality of word line driving circuits, a plurality of sense amplifier circuits, and a plurality of plate line drivers,
• wherein the first region includes a plurality of word lines extending in a first direction, a plurality of bit lines extending in a second direction perpendicular to the first direction, and a plurality of plate lines,
• wherein the first switching element is connected to one of the plurality of word lines and one of the plurality of bit lines,
• wherein the plurality of plate lines are disposed on the plurality of word lines, the plurality of bit lines, and the second switching element in a third direction, perpendicular to the first direction and the second direction, and are stacked in the third direction,
• wherein in each of the memory cell groups, the plurality of capacitors penetrate the plurality of plate lines in the third direction, and the capacitors are connected to the plurality of plate lines different from each other, and
• wherein the second switching element is connected to a voltage source located between the first switching element and the plurality of capacitors and set to a predetermined voltage.

A semiconductor device comprising:

• a plurality of word lines;
• a plurality of bit lines;
• a plurality of plate lines;
• and
• a plurality of memory cell groups connected to the plurality of word lines, the plurality of plate lines, and the plurality of bit lines,
• wherein each of the plurality of memory cell groups includes a first switching element, a second switching element, and a plurality of capacitors connected to the first switching element and including a ferroelectric layer, and
• wherein in each of the plurality of memory cell groups, the first switching element is connected to one of the word lines and one of the bit lines, the plurality of capacitors are connected to the plurality of plate lines different from each other, and the second switching element is connected between the first switching element and the plurality of capacitors.