Semiconductor memory device

A semiconductor memory device comprising:

• a plurality of first power supply voltage pads;
• a plurality of second power supply voltage pads;
• and
• a plurality of data input/output pads connected to a plurality of data output drivers, respectively,
• wherein, from among the plurality of first power supply voltage pads and from among the plurality of second power supply voltage pads, a first power supply voltage pad is disposed between a pair of adjacent second power supply voltage pads,
• wherein, from among the plurality of data input/output pads, a first data input/output pad is disposed between one of a pair of second power supply voltage pads and the first power supply voltage pad, and a second data input/output pad is disposed between the other of the pair of second power supply voltage pads and the first power supply voltage pad, and
• wherein a data output driver connected to the first data input/output pad and a data output driver connected to the second data input/output pad are connected in common to the first power supply voltage pad.

A semiconductor memory device comprising:

• first and second data input/output pads defined in a pad layer on a substrate;
• a first data input circuit defined in the substrate and connected to the first data input/output pad;
• a second data input circuit defined in the substrate and connected to the second data input/output pad;
• a first reference voltage generation circuit defined in the substrate, and providing a reference voltage to the first data input circuit;
• a second reference voltage generation circuit defined in the substrate, and providing a reference voltage to the second data input circuit;
• and
• a first power supply voltage pad defined in the pad layer, and disposed between the first data input/output pad and the second data input/output pad,
• wherein, when viewed in a plan view, the first and second reference voltage generation circuits are disposed between the first data input/output pad and the second data input/output pad.