Active window and tile-based image processing systems and methods

Image processing circuitry comprising:

• tile assignment circuitry configured to determine locations of a plurality of tiles relative to an image frame;
• and
• memory-to-memory scaler and rotator (MSR) circuitry configured to:
• fetch a first respective portion of input image data corresponding to a first tile of the plurality of tiles;
• process the first tile to generate a first respective portion of processed image data based on the first respective portion of the input image data;
• fetch a second respective portion of the input image data corresponding to a second tile of the plurality of tiles;
• and
• process the second tile to generate a second respective portion of the processed image data based on the second respective portion of the input image data and a sub-portion of the first respective portion of the input image data.

A non-transitory machine-readable medium comprising instructions, wherein, when executed by one or more processors, the instructions cause the one or more processors to control operations of image processing circuitry or to perform the operations, the operations comprising:

• fetching a first respective portion of input image data corresponding to a first tile of a plurality of tiles that span an image frame, wherein tiles the plurality of tiles do not overlap;
• processing the first tile to generate a first respective portion of processed image data based on the first respective portion of the input image data;
• fetching a second respective portion of the input image data corresponding to a second tile of the plurality of tiles;
• and
• processing the second tile to generate a second respective portion of the processed image data based on the second respective portion of the input image data and a sub-portion of the first respective portion of the input image data fetched for processing of the first tile.