US 2026/0087215 A1 · MACHINE LEARNING (ML)-BASED STAGE-LOOKAHEAD STATIC TIMING ANALYSIS (STA) AND GRADIENT-DESCENT DRIVEN PLACEMENT TIMING OPTIMIZATION

Abstract

A machine-learning (ML)-based system may be used in the placement phase of integrated circuit chip design. The ML-based system may include a placer and a ML-based static timing analyzer. The placer may receive a floorplan and a netlist as inputs. The placer may iteratively generate and evaluate intermediate placements based on the floorplan, the netlist, and iterative feedback that is based on the intermediate placements. The ML-based static timing analyzer may provide total negative slack (TNS) gradient information based on the intermediate placements. The iterative feedback used by the placer may include this TNS gradient information. On the last iteration, the placer may output the last intermediate placement.

Claims20

Dependent claims

A method for providing a placement in designing an integrated circuit chip, comprising:

receiving, by a placer, a floorplan and a netlist, the placer configured to iteratively generate and evaluate intermediate placements based on the floorplan, the netlist, and iterative feedback based on the intermediate placements;
providing, by a machine learning (ML)-based static timing analyzer, total negative slack (TNS) gradient information based on the intermediate placements;
and
providing, by the placer, an output placement comprising a last iteration of the intermediate placements, wherein the iterative feedback includes the TNS gradient information.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

18/892,140Filed 20 Sep 2024

Published

26 Mar 2026

Term ends

Not estimatedThe source records don’t support an estimate.

Classification6 codes

G06F 30/327
Circuit design at the digital level: logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
G06F 30/337
Circuit design at the digital level: design optimisation
G06N 3/047
Architecture, e.g. interconnection topology: probabilistic or stochastic networks
G06F 2119/12
Details relating to the type or aim of the analysis or the optimisation: timing analysis or timing optimisation

Machine learning (ml)-based stage-lookahead static timing analysis (sta) and gradient-descent driven placement timing optimization

Life of this patent

Machine learning (ml)-based stage-lookahead static timing analysis (sta) and gradient-descent driven placement timing optimization

Life of this patent

Abstract

Claims20