Multimodal memory integrated circuit with native-speed encrypted data processing for use in unbreakable cryptography

A method of native-speed encrypted data processing for use in cryptography, the method comprising:

• receiving, from a memory on a chip substrate of a multimodal integrated circuit (IC) chip, a first set of data on at least one processing device of the IC chip, the first set of data encrypted by a first OTP key;
• receiving, from the memory, at least a second set of data on the at least one processing device, the at least second set of data encrypted by at least a second OTP key;
• decrypting, by the at least one processing device, the first set of data and the at least second set of data;
• processing, by a first externally-originating operation on the at least one processing device, the decrypted first and at least second sets of data;
• and
• encrypting, by the at least one processing device, the processed data.

A method of in-circuit quantum key distribution, the method comprising:

• generating, by a truly random number generator (TRNG) stored on a memory on a chip substrate of a multimodal integrated circuit (IC) chip, key bits corresponding to an in-circuit OTP key;
• storing, in the memory, the key bits of the in-circuit OTP key;
• receiving, from a first partition of the memory, a first set of data on at least one processing device of the IC chip, the first set of data encrypted by a first OTP key;
• encrypting, by the at least one processing device, the first set of data using the in-circuit OTP key;
• decrypting, by the at least one processing device, the first set of data using the first OTP key;
• encrypting, by the at least one processing device, the first set of data using a second OTP key;
• decrypting, by the at least one processing device, the first set of data using the in-circuit OTP key;
• and
• storing, on a second partition of the memory, the first set of data encrypted by the second OTP key.

A multimodal integrated circuit (IC) chip with native-speed encrypted data processing for use in cryptography, the IC chip comprising:

• a chip substrate;
• a memory positioned on the chip substrate, wherein when key bits from key data are stored on the memory, unauthorized access of the key bits is prevented;
• a plurality of partitions within the memory, wherein at least one partition is encrypted;
• and
• at least one processing device positioned on the chip substrate, wherein the at least one processing device prohibits access of the at least one encrypted partition by at least one other partition without an externally-originating verification operation.