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US 2026/0086933 A1Published application
Chip and its memory management method
AssigneeSigmastar Technology Ltd.
InventorsXuelin Ye, Wenshuai Xi
Life of this patent
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AssigneeSigmastar Technology Ltd.
InventorsXuelin Ye, Wenshuai Xi
Estimating the term…
A chip is connected to a memory that includes a memory section composed of multiple memory blocks. The chip includes a memory management circuit and a computing circuit. The computing circuit, connected to both the memory and the memory management circuit, is configured to execute a memory management driver to perform the following steps: receiving a memory request; searching a memory region for at least one free memory block according to a memory region linked list containing a node corresponding to the memory region, where the memory region is a part of the memory section; and using the memory management circuit to perform memory mapping on the at least one free memory block found.
A chip coupled to a memory, the memory comprising a memory section, the memory section comprising a plurality of memory blocks, the chip comprising:
A memory management method applied to a memory, the memory comprising a memory section, the memory section comprising a plurality of memory blocks, the method comprising:
Dependencies are inferred from the claim text.