Low stress flipchip mems package
AssigneeSTMicroelectronics International N.V.
InventorJefferson Sismundo TALLEDO
Life of this patent
Estimating the term…
Loading patent…
AssigneeSTMicroelectronics International N.V.
InventorJefferson Sismundo TALLEDO
Estimating the term…
Disclosed herein is a microelectromechanical systems (MEMS) package and its manufacturing method. The package includes a substrate with a first cavity, an interposer mounted on the substrate, a MEMS die attached to the interposer and extending into the first cavity, and a cap extending over the interposer and MEMS die. The cap, combined with the first cavity, defines a second cavity enclosing the MEMS die, allowing it to float within a gas or near-vacuum environment. An Application-Specific Integrated Circuit (ASIC) is mounted on the substrate using an adhesive die attach film and electrically connected via bonding wires. The MEMS die is connected to the interposer using flipchip bonding with conductive bumps formed on the interconnect structure of the MEMS die. The interposer is electrically connected to the substrate using conductive bumps. This packaging approach isolates the MEMS die from external stresses.
A microelectromechanical systems (MEMS) package, comprising:
A method of manufacturing a microelectromechanical systems (MEMS) package, the method comprising:
Dependencies are inferred from the claim text.