Resistive random access memory based one-time-programmable memory devices

A memory device, comprising:

• a lock bit circuit operatively coupled to a first memory array of a plurality of memory arrays;
• a controller communicatively coupled to the lock bit circuit, the controller configured to:
• receive the lock bit from the lock bit circuit;
• and
• permit or disable programming of the first memory array according to the lock bit.

A method for operating a memory device, comprising:

• receiving, by a controller, a lock bit from a lock bit circuit communicatively coupled to the controller, the lock bit circuit operatively coupled to a memory array;
• and
• permitting programming of the memory array according to the lock bit having a first logic state;
• or
• disabling programming of the memory array according to the lock bit having a second logic state.