Pre-fabricated pin-based vertical electrical connectivity in a package substrate
AssigneeNVIDIA Corporation
InventorsPadam Jain, Tony Baek, Sean Kalchuri
Life of this patent
Estimating the term…
Loading patent…
AssigneeNVIDIA Corporation
InventorsPadam Jain, Tony Baek, Sean Kalchuri
Estimating the term…
A substrate is disclosed. In one embodiment, the substrate comprises a substrate core including a plurality of through holes located therethrough, a plurality of metal pins aligned in the plurality of through holes, and at least one layer deposited on at least one of top and bottom surfaces of the substrate core. In one embodiment, the plurality of metal pins are aligned with the plurality of through holes such that each of the plurality of metal pins extends at least to both the top and bottom surface of the substate core. In some embodiments, the deposited at least one layer is deposited after the plurality of metal pins have been aligned in the through holes of the substrate core.
A substrate, comprising:
A method of manufacturing a substrate, comprising:
An assembled substrate, comprising:
Dependencies are inferred from the claim text.